This disclosure is based upon, and claims priority from French Patent Application No. 98/00859, filed Jan. 27, 1998, and International Application No. PCT/FR99/00062, filed Jan. 15, 1999, the contents of which are incorporated herein by reference.
The invention relates to smart cards, i.e. cards including essentially a memory as well as its addressing circuits for data or information recording and reading.
The memory of these cards is recorded and/or read using a terminal, such as a card reader, which communicates with the memory via electric signals applied through contacts. The electric signals are prepared by the terminal according to particular normative protocols whose main feature lies in the fact that they are indirect addressing synchronous protocols.
With such protocols, the transaction sequence is as follows:
resetting the card, notably the memory address counter, either at power-up or via a reset signal on a dedicated pin;
positioning the memory address counter at the right address by applying a determined plurality of pulses onto a pin corresponding to the clock pulses;
a recording or reading command in the memory via a combination of signals applied on an Input/Output pin and on another pin which can be the reset pin, the clock pin or any other pin.
The shortcomings of such a smart card functioning according to such an operating mode are summed up hereinafter.
As the communication between a reader and a card, notably for a financial transaction, is sensitive to electric noises (voltage drop, faulty electric contacts, spurious pulses, etc., the accuracy of the message exchanged is not guaranteed.
This implies notably to repeat the communication one or several times in order to make sure that the transaction has been completed correctly.
Repeating the messages lengthens the time necessary to a transaction.
Moreover, it is possible to get faulty transactions further to the said electric noises.
Memory addressing is performed via a pulse counter which counts the series of pulses applied to the said counter and the code displayed by the counter at the end of the said series constitutes the address code of the memory. This so-called indirect addressing calls for a certain duration further to pulse counting and may be a source of error, for instance if a given pulse is not taken into account for various reasons.
Neither the data nor the command received are checked for integrity, hence a certain lack of security.
The transaction protocol is of synchronous type, which implies rigorous synchronism between the terminal and the smart card, a synchronism which is sometimes difficult to obtain and to maintain during the transaction because of external disturbances.
No acknowledgement of receipt is given when receiving the data or the command received.
Correct operation of the command is not checked.
An objective of the present invention is therefore to provide a smart card which does not exhibit the shortcomings afore mentioned.
This objective is satisfied by modifying the signals applied to the smart card as well as the access circuits to the card memory so that:
communication between the terminal and the smart card is performed using an asynchronous communication protocol;
memory addressing is direct addressing;
the information received by the card and relating to an address, a command or a data, can be checked;
the smart card returns an acknowledgement of receipt to the terminal, to confirm that the information was received in full;
the smart card transmits to the terminal a piece of information stating that the command was executed correctly.
The invention relates to a contact smart card comprising a memory capable of working together with a terminal via access circuits comprising an addressing circuit and a control circuit, characterised in that the access circuits to the said memory further comprise:
a circuit for receiving and analysing electric signals applied to the contacts of the smart card by the terminal, whereas the said reception and analysis circuit provides messages and codes;
a circuit for interpreting and switching the codes supplied by the analysis circuit according to whether it is a memory address code, a data code or a control code;
an address register which records the address code supplied by the interpretation and switch circuit to make it available to the addressing circuit;
at least one data register which records the control code of the operation to be performed on the memory or the data code, possibly to be recorded therein, in order to make the said codes available to the control circuit with a view to performing the operation indicated by the control code,
at least one output register which records the code read in the memory or the execution status code of the control, supplied by the control circuit, and
a circuit for transmitting to the contacts, the codes supplied by the output register and messages supplied by the reception and analysis circuit in order to transmit them to the terminal.
The card according to the invention is advantageously, after a few minor improvements, in addition to the wired functions mentioned above, totally compatible with readers of the existing stock. In particular, it is especially advantageous to be able to use the microprocessor card readers, which is currently impossible with the present smart cards.